1. Field of the Invention
The present invention relates to circuits and techniques for performing calculations. More specifically, the present invention relates to circuits and techniques for performing modulus-based error checking of calculations.
2. Related Art
Computers are widely used to perform calculations. For example, a processor in a computer may be used to add two numbers or multiply two numbers. Unfortunately, errors can occur when performing such calculations. Consequently, many existing computers perform error-checking operations to confirm that a processor performed the calculations correctly.
Checking for errors by inverting an operation, such as by performing long division of a product and looking at the remainder, is time consuming and expensive. Instead, in many existing computers error checking is performed by computing moduli. In particular, it is known that mod p (mod p (a)+mod p (b))=mod p (a+b) and mod p (mod p (a)*mod p (b))=mod p (a*b), where mod p is the modulo base p, p is a prime number, and a and b are numbers.
Typically, error checking based on different prime numbers can detect different errors than error checking based on one prime number. Thus, performing error-checking calculations using more than one modulo base can reduce the number of undetected errors. However, this approach typically doubles the area of the error-checking circuit, which is often cost prohibitive.
Hence, there is a need for a technique to perform error checking in computer systems without the above-described problems.